Wednesday, January 8, 2020

FMA Unit 1.5 Input output ports


Input / Output Port

The micro controller 8051 has four ports P0, P1, P2, P3. These ports are required for I/O operation.
1.    Port 0
·         It is a multi-functioned port can be used
a.    As simple input / output mode, 
b.   for generating data and
c.    as lower order address bus for external memory (A0 to A7)
·         Port 0 does not have an internal pull up, hence port 0 is configured as an output port external pull up is required.
                1.1.Port 0 as a Simple Input Port
                When port 0 is used as an input port a ‘1’ must be written to the corresponding port 0 latch              that will cause both the output transistor to switch off and the pin “floats” in a high                              impedance   state.
                1.2.Port 0 as a Simple Output Port
·         When port 0 is used as an output port, the latch pins that are programmed to “0” will cause the lower FET to turn ON and pin is grounded. (0)
·         If a “1” is written on the latch pin the FET will turn OFF and the pin is pulled High by external pull up resistor.


                1.3.Port 0 used as address bus for External memory
·         Port 0 generates the lower order address A0 to A7.
·         When port 0 is used as an address bus to external memory, the internal control signals switch the address line to gate of FETs.
·         If logic ‘1’ is written to address bit, then upper FET is will turn ON and lower FET will turn OFF providing logic HIGH at the pin
·         If logic ‘0’ is written to address bit, then upper FET is will turn OFF and lower FET will turn ON providing logic LOW at the pin






2.    Port 1

Port 1 does not have any extra function. Hence the output latch is connected directly to the gate of lower FET
                 2.1.Port 1 as a Simple Input Port
·         When port 1 is  used as an input port a ‘1’ must be written to the corresponding port 1 latch that will cause the lower FET turn OFF, The pin and input to the pin buffer are pulled logic “1” by internal pull up.

                2.2.Port 1 as a Simple Output Port
·         When port 1 is used as an output port, the latch pins that are programmed to “0” will cause the lower FET to turn ON, the internal pull up to turn OFF and input to the circuit is logic 0.






      3.      Port 2
Port 2 is multifunctional port. It can be used as a simple input / output port or for generating the order address bus for external memory.
                3.1.Port 2 as a Simple Input Port
·         When port 2 is  used as an input port a ‘1’ must be written to the corresponding port 2 latch that will cause the lower FET turn OFF, The pin and input to the pin buffer are pulled logic “1” by internal pull up.


                3.2.Port 2 as a Simple Output Port
·         When port 2 is used as an output port, the latch pins that are programmed to “0” will cause the lower FET to turn ON, the internal pull up to turn OFF and input to the circuit is logic 0.
·         If a ‘1’ is written onto the latch pin then it will drive the input of external circuit high through the pull up. The Lower FER turn OFF.

               3.3.Port 2 used as address bus for External memory
·         Port 2 generates the higher order address A8 to A15.
·         When port 2 is used as an address bus to external memory, the internal control signals switch the address line to gate of FETs.
·         The latch Remain stable because it does not have to turn around for the data input as port 0.


     4.      Port 3
Port 3 is a multifunction port it can be used as simple input / output port. The port 3 pins have special functions.
ü  P3.0 - (RXD): It is a Serial Communication Input.
ü  P3.1 -  (TXD): It is a Serial Communication output
ü  P3.2 -  (INT0 bar): Input of Interrupt 0
ü  P3.3 -  (INT1 bar): Input of Interrupt 1
ü  P3.4 -  (T0): Input of Counter 0 clock
ü  P3.5 -  (T1): Input of Counter 1 clock
ü  P3.6 - ( WR bar): Writing Signal to write content on external RAM.
ü  P3.7 -  (RDbar): Reading Signal to read contents of external RAM.

·         Unlike the ports 0 and 2, where all the 8 bits simultaneously change for alternate use.
·         Each bit of port 3 can be programmed as I/O to perform one of the functions.
·         Port 3 bit contains D type latch, three unidirectional buffers, FET with internal pull-up. As the internal pull up is fixed port 3 is called as quasi-bidirectional.


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