FMA Unit 3.3 A Timer and Counter

A Timer and Counter

The microcontroller 8051 has two 16 bit Timer/Counter register namely Timer 0 (T0) and Timer (T1). Both these register can be configured independently as a timer or Counter.

Timer:

·         If the timer incremented by Internal Clock then it is called as Timer.

·         It is a specialized type of clock which is used to measure time intervals.

·         A timer that counts from zero upwards for measuring time elapsed is often called a stopwatch.

·         It is a device that counts down from a specified time interval and used to generate a time delay.

·         The register incremented for every machine cycle i.e 12 oscillator periods.

·         Maximum count rate is 1/12^th  of the oscillator frequency.

Counter:

·         If the timer incremented by External Clock then it is called as Counter.

·         A counter is a device that stores (and sometimes displays) the number of times a particular event or process occurred, with respect to a clock signal.

·         It is used to count the events happening outside the microcontroller.

·         The register is incremented in response to high to low of the corresponding to an external input pin (T0, T1). Hence it requires two machine cycles i.e 24 oscillator periods.

·         Maximum count rate is 1/24^th  of the oscillator frequency.

Timers of 8051 and their Associated Registers

The 8051 has two timers, Timer 0 and Timer 1. They can be used as timers or as event counters. Both Timer 0 and Timer 1 are 16-bit wide. Since the 8051 follows an 8-bit architecture, each 16 bit is accessed as two separate registers of low-byte and high-byte.

Timer 0 Register

·         The 16-bit register of Timer 0 is accessed as low-byte and high-byte.

·         The low-byte register is called TL0 (Timer 0 low byte) and the high-byte register is called TH0 (Timer 0 high byte).

·         These registers can be accessed like any other register.

·         For example, the instruction MOV TL0, #4H moves the value into the low-byte of Timer #0.

Timer 1 Register

·         The 16-bit register of Timer 1 is accessed as low- and high-byte.

·         The low-byte register is called TL1 (Timer 1 low byte) and the high-byte register is called TH1 (Timer 1 high byte).

·         These registers can be accessed like any other register.

·         For example, the instruction MOV TL1, #4H moves the value into the low-byte of Timer 1.

FMA Unit 3.4 Timer Registers

To control timer operation two special Functions Register are used

1.         TCON (Timer Control Register)

2.         TMOD (Timer Mode Selection Register)

TCON register

TCON is an 8-bit register, which controls the timer1 and timer0.

Bits and functions of every bits of TCON are as follows:

BIT	Function
TF1 / TF0	·      Timer 1 / Timer 0 overflow. ·      This bit is set (i.e. TF1=1 / TF0=1) by the microcontroller when timer1 / timer0 overflows.
TR1 / TR0	·      Timer 1 / Timer 0 run. ·      When this bit is set (i.e. TR1=1 / TR0=1) Timer1 / Timer0 is turn on. ·      When this bit is reset (i.e. TR1=0 / TR0=0) Timer1 / Timer0 is off.
IE1 / IE0	·      External interrupt (  / ) Edge flag. ·      This bit is set (i.e. IE1=1 / IE0=1) when external interrupt (  / ) arrives.
IT1 / IT0	·      External interrupt (  / ) triggered type control bit. ·      This bit is set (i.e. IT1=1 / IT0=1) when external interrupt (  / ) is edge triggered. ·      This bit is clear (i.e. IT1=0 / IT0=0) when external interrupt (  / ) is level triggered.

TMOD (Timer Mode) Register

Both Timer 0 and Timer 1 use the same register to set the various timer operation modes. It is an 8-bit register in which the lower 4 bits are set aside for Timer 0 and the upper four bits for Timer 1.

BIT	Function
Gate	·      Timer1 / Timer0 control. Every timer has a means of starting and stopping.  Timers do this by software or hardware. ·      This bit is reset (i.e. Gate=0) when timer 1 / timer 0 controlled by software. It means when this bit is reset, timer1 / timer0 will start when TR1 / TR0 bit of TCON is set. ·      This bit is set (i.e. Gate=1) when timer 1 / timer 0 controlled by hardware. It means when this bit is set, timer1 / timer0 will start after arriving of external interrupt (  / ) (provided that TR1 / TR0 bit of TCON should be set).
	·      Timer or Counter selector. ·      When this bit is reset (i.e.  =0) Timer1 / Timer0 will work as timer. ·      When this bit is set (i.e.  =1) Timer1 / Timer0 will work as counter.
M1 & M0	M1 M0 Mode Operating Mode 0 0 0 13-bit timer mode, 0 1 1 16-bit timer mode, 1 0 2 8-bit auto reload mode, 1 1 3 8-bit Spilt timer mode.

FMA Unit 3.5 Different Modes of Timers

Different Modes of Timers

Mode 0 (13-Bit Timer Mode)

·         Mode 0 is selected when M1 = 0 & M0 = 0 placed in TMOD SFR.

·         This is 13 bit timer can be loaded as TLx = 5 bits and THx = 8 bits

·   TLx can load value starting from 0 to 31 (001FH). When TLx is incremented above 31, it will reset to 0 and then start incrementing THx.

·         As this 13 bit timer, that counts starting from 0 to 8191. After that it will overflow.

·         When C/T(bar) , then timer will work as a timer to provide time delay.

·         When C/T(bar) , then timer counts external clock pulses applied at pin Tx.

  

Mode 1 (16-Bit Timer Mode)

·         Mode 1 is selected when M1 = 0 & M0 = 1 placed in TMOD SFR.

·         This is 16 bit timer can be loaded as TLx = 8 bits and THx = 8 bits
·         This mode is most commonly used and it provides maximum delay.

·      TLx can load value starting from 0 to 255. When TLx is incremented above 255, it will reset to 0 and then start incrementing THx.

·         As this 16 bit timer, that counts starting from 0 to 65535. After that it will overflow.

·         When C/T(bar), then timer will work as a timer to provide time delay.

·        When C/T(bar), then timer counts external clock pulses applied at pin Tx.

Mode 2 (8 Bit Auto Reload)

·         Mode 2 is selected when M1 = 1 & M0 = 0 placed in TMOD SFR.

·         It is 8 bit auto reloaded mode.

·      Initially 8 bit count loaded into THx which is automatically copied into TLx.

·         When Timer starts, clocks are received by TLx. TLx goes on incrementing up to its maximum value 255 and set the TFx.

· This mode is commonly used for deciding baud rate in serial communication.

  

Mode 3 (Split Timer Mode)

·         Mode 3 is selected when M1 = 1 & M0 = 3 placed in TMOD SFR.

·         When Timer 0 is placed in mode 3, it becomes two separate 8-bit timers.

·         Timer 0 is TL0 and Timer 1 is TH0. Both the timers count from 0 to 255 and in case of overflow, reset back to 0.

·         All the bits that are of Timer 1 will now be tied to TH0.

·         When Timer 0 is in split mode, the real Timer 1 (i.e. TH1 and TL1) can be set in modes 0, 1 or 2, but it cannot be started / stopped as the bits that do that are now linked to TH0.
·         The real timer 1 will be incremented with every machine cycle.

FMA Unit 4.1 Interrupt

8051 Interrupts

Interrupts are the events that temporarily suspend the main program, pass the control to the external sources and execute their task. It then passes the control to the main program where it had left off.

Interrupts are of different types like software and hardware, maskable and non-maskable, fixed and vector interrupts, and so on. Interrupt Service Routine (ISR) comes into the picture when interrupt occurs, and then tells the processor to take appropriate action for the interrupt, and after ISR execution, the controller jumps into the main program.

Interrupt Structure

Upon ‘RESET’ all the interrupts get disabled, and therefore, all these interrupts must be enabled by software. In all these five interrupts, if anyone or all are activated, this sets the corresponding interrupt flags as shown in the figure.

All these interrupts can be set or cleared by bit in some special function register that is Interrupt Enabled (IE), and this in turn depends on the priority, which is executed by IP interrupt priority register.

 

 

A.     IE register (Interrupt Enable Register)

IE register is used to enable/disable interrupt sources.

      

Bit 7 – EA: Enable All Bit

                              1 = Enable all interrupts

                    0 = Disable all interrupts

Bit 6,5 – Reserved bits

Bit 4 – ES: Enable Serial Interrupt Bit

                   1 = Enable

                   0 = Disable

Bit 3 – ET1: Enable Timer 1 Interrupt Bit

          1 = Enable

                             0 = Disable

Bit 2 – EX1: Enable External 1 Interrupt Bit

                             1 = Enable

                   0 = Disable

Bit 1 – ET0: Enable Timer 0 Interrupt Bit

                   1 = Enable

                   0 = Disable

Bit 0 – EX0: Enable External 0 Interrupt Bit

                             1 = Enable

                   0 = Disable

B.    Interrupt priority

In the table, interrupts priorities upon reset are shown. As per 8051 interrupt priorities, lowest priority interrupts are not served until microcontroller is finished with higher priority ones. In a case when two or more interrupts arrives microcontroller queues them according to priority.

Priority	Intr. bit / flag
1	INT0
2	TF0
3	INT1
4	TF1
5	(TI/RI)

B.1. IP Register (Interrupt priority register)

8051 has interrupt priority register to assign priority to interrupts.  

     

Bit 7,6,5 – Reserved bits.

Bit 4 – PS: Serial Interrupt Priority Bit

            1 = Assign high priority.

            0 = Assign low priority.

Bit 3 and Bit 1 – PT: Timer 1 / Timer 0 Interrupt Priority Bit         

            1 = Assign high priority.

            0 = Assign low priority.

Bit 2 and Bit 0 – PX: External Interrupt 1 / External Interrupt 0 Priority Bit    

            1 = Assign high priority.

            0 = Assign low priority.

Types of Interrupts in 8051 Micro controller

When an interrupt occurs, the micro-controller executes the interrupt service routine so that memory location corresponds to the interrupt that enables it.

The Interrupt corresponding to the memory location is given in the interrupt vector table below.

Interrupt	Flag	Interrupt vector address
Reset	-	0000H
INT0 (Ext. int. 0)	IE0	0003H
Timer 0	TF0	000BH
INT1 (Ext. int. 1)	IE1	0013H
Timer 1	TF1	001BH
Serial	TI/RI	0023H

1             1.  Reset

          Reset is the highest priority interrupt, upon reset 8051 microcontroller start                    executing code from 0x0000 address.

2             2. Internal interrupt (Timer Interrupt) (TF0 and TF1)

8051 has two internal interrupts namely timer0 and timer1. Whenever timer overflows, timer overflow flags (TF0/TF1) are set. Then the microcontroller jumps to their vector address to serve the interrupt. For this, global and timer interrupt should be enabled.

3             3. Serial interrupt (RI/TI)

8051 has serial communication port and have related serial interrupt flags (TI (Transfer Interrupt) /RI (Receiver Interrupt)).

When the last bit (stop bit) of a byte is transmitted, TI serial interrupt flag is set and when last bit (stop bit) of receiving data byte is received, RI flag get set.

4. External interrupts

8051 has two external interrupt INT0 and INT1. External interrupt has two types of activation level

1.                 Edge triggered (Interrupt occur on rising/falling edge detection)

2.                 Level triggered (Interrupt occur on high/low-level detection)

Whenever a low level / falling edge is detected on the INT0/INT1 pin while global and external interrupts are enabled, the controller jumps to interrupt service routine (ISR) to serve interrupt.

4.1.    TCON: Timer/ counter Register

Bit 3 and Bit 1 - IE:      

       External Interrupt 1/ External Interrupt 0 edge flag, set by hardware when interrupt on INT1 / INT0 pin occurred and cleared by hardware when interrupt get processed.

Bit 2 and Bit 0 - IT1:

 This bit selects external interrupt event type on INT1 / INT0 pin,

       1= sets interrupt on falling edge

       0= sets interrupt on low level